The semiconductor industry has been driven to reduce the size of integrated circuits (ICs) for many years. Three dimensional ICs (3D-IC) with ultra-thin wafers stack have been studied extensively. To support 3D-IC packaging, it is desirable not only to reduce the footprint of the IC, but also to reduce the thickness of the chip. Thinner chips may allow the use of 3D-IC for products in which a thin package is desired, such as mobile handheld communications devices (e.g., cellular phones and PDA's). A frequent method of achieving thin chips is to remove material from the back surface of the semiconductor wafer by chemical and/or mechanical means before singulation.
In a conventional wafer thinning process, mechanical grinding removes most of the silicon. Then, chemical-mechanical polishing (CMP) or wet etching releases the grinding stress to provide an ultra-thin wafer. But as the final thickness of the wafer shrinks, damage caused by mechanical grinding/CMP becomes a bigger concern and the impact of the grinding stress is unpredictable.
For the above reasons, wet etching has gradually become the dominant approach in the wafer thinning process. Some chip manufacturers have focused on silicon-on-insulator (SOI) wafers, and use a process in which wet etching stops on the buried oxide layer to achieve a desired thickness and uniformity.
Other manufacturers, focus on a bulk Si wafer approach, using wet etching. However, the bulk Si approach does not have the etch stop layer used in SOI processes, and may result in a non-uniform substrate thickness.
Currently, both Semitools and SEZ AG of Villach, Austria provide wet etching solutions for wafer thinning. Semitool's wet batch wafer thinning controls the amount of etching by time, but does not provide thickness uniformity control, so the uniformity of wafer gets worse as Si removal increases. SEZ provides etch control by spectrometer analysis of the process effluent to detect a chemical inlet shift. The shift at the chemical inlet indicates that the material being etched has changed, which is a sign that the etchant has removed an overlying layer, and has begun to etch an underlying layer.
An method for providing uniform thickness across a wafer is desired.